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Hardware description language

In electronics, a hardware description language or HDL is a standard text-based format for describing either the behaviour or the structure, or both, of an electronic circuit. Most HDLs are restricted to describing digital circuits, but there are exceptions.

HDLs have two purposes. First, they are used to write a model for the expected behaviour of a circuit before that circuit is designed and built. The model is fed into a computer program, called a simulator, that allows the designer to verify that his solution behaves correctly. Second, they are used to write a detailed description of a circuit that is fed into another computer program called a logic compiler. The output of the compiler is used to configure a programmable logic device that has the desired function. Often, the HDL code that has been simulated in the first step is re-used and compiled in the second step.

An HDL is analogous to a software programming language, but with subtle differences. Both types of language are processed by a compiler. An HDL compiler often works in several stages, first producing a logic description file in a proprietary format, then converting that to a logic description file in the industry-standard EDIF format, then converting that to a JEDEC-format file. The JEDEC file contains instructions to a PLD programmer for building logic.

On the other hand, a software compiler generates instructions to a microprocessor for moving data. The difference between HDLs and software languages is becoming less distinct as reconfigurable systems are beginning (in 2002) to combine features of both.

HDLs used by logic compilers include:

  • Verilog HDL
  • VHDL
  • ABEL (a proprietary language developed by the Data I/O Corporation and now owned by Lattice Semiconductor)
  • AHDL (a proprietary language used by Altera)
  • CUPL (a proprietary language used by Logical Devices, Inc.)

The current trend is to move away from proprietary HDLs and towards the two leading standards, VHDL and Verilog HDL.

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