Programmable logic device

A programmable logic device or PLD is an electronic component used to build digital circuits. Unlike a logic gate, which has a fixed function, a PLD has an undefined function at the time of manufacture. Before the PLD can perform in a circuit it must be programmed.

It is impossible to discuss PLD technology without mentioning some of the companies involved in its development. However, it is not the purpose of this article to list all manufacturers of PLDs. Inclusion or omission of a particular company from this article is intended as neither a recommendation nor a criticism.

Table of contents 1 Early PALs 2 GALs 3 CPLDs 4 FPGAs 5 Other Types of PLDs 6 How PLDs Remember Their Configuration 7 PLD Programming Languages

Early PALs The first programmable logic devices were produced by the Advanced Micro Devices (AMD) corporation. The devices were called PALs, for programmable array logic. The programmable array contains logic gates, themselves fixed in function, with programmable interconnections between them. The array has a number of inputs and outputs, and can create any Boolean function of a selection of the inputs at any of its outputs. A single PAL can replace a circuit containing a large number, perhaps a few hundred, of fixed logic gates.

The PLD business split from AMD under the name Vantis, and was acquired by Lattice Semiconductor in 1999.

In a PAL the logic gates are arranged as a sum-of-products array. In Boolean terms, this means a number of AND gates whose outputs feed into a large OR gate that drives one output. By selecting which inputs drive each AND gate, and which AND gates drive the OR gate, any Boolean function can be created. It can be shown that any Boolean function can be reduced to a sum of products, and can therefore be created by a sufficiently large PAL.

A PAL is programmed by fitting it into a machine called a PAL programmer. PAL programmers are usually general-purpose machines that can program all types of PLD from all manufacturers. A PAL may be programmed only once.

The PAL programmer must be supplied with a description of the PAL's desired configuration. This is usually in the form of a computer text file with a standard format defined by the Joint Electron Device Engineering Council (JEDEC). JEDEC files can be hand-typed by the design engineer or, more commonly, produced by a computer program similar to the language compilers used by software engineers.

GALs An innovation of the PAL was the generic array logic device, or GAL, invented by Lattice Semiconductor Inc. This device has the same logical properties as the PAL but can be erased and reprogrammed. The GAL is very useful in the prototyping stage of a design, when any bugs in the logic can be corrected by reprogramming. GALs are programmed and reprogrammed using a PAL programmer.

A similar device called a PEEL (programmable electrically erasable logic) was introduced by the Integrated Circuit Technology (ICT) corporation.

CPLDs PALs and GALs are available only in small sizes, equivalent to a few hundred logic gates. For bigger logic circuits, complex PLDs or CPLDs can be used. These contain the equivalent of several PALs linked by programmable interconnections, all in one integrated circuit. CPLDs can replace thousands, or even hundreds of thousands, of logic gates.

Some CPLDs are programmed using a PAL programmer, but this method becomes inconvenient for devices with hundreds of pins. A second method of programming is to solder the device to its printed circuit board, then feed it with a serial data stream from a personal computer. The CPLD contains a circuit that decodes the data stream and configures the CPLD to perform its specified logic function.

Each manufacturer has a proprietary name for this programming system. For example, Lattice calls it "in-system programming". However, these proprietary systems are beginning to give way to a standard from the Joint Test Action Group (JTAG).

FPGAs While PALs were busy developing into GALs and CPLDs (all discussed above), a separate stream of development was happening. This type of device is based on gate-array technology and is called the field-programmable gate array (FPGA). Gate arrays are non-programmable devices that can be manufactured more cheaply than other types of IC, because they contain a standard grid of logic gates whose interconnections are specified by the customer. When a customer orders a new type of chip, the manufacturer does not have to design it from scratch, but can just take a standard gate array and modify it to the customer's requirement.

FPGAs use a similar grid of logic gates, but the programming is done by the customer, not by the manufacturer. The term "field-programmable" may be obscure to some, but the "field" is just an engineering term for the world outside the factory where customers live.

FPGAs are usually programmed after being soldered down to the circuit board, in the same way as larger CPLDs. In most larger FPGAs the configuration is volatile, and must be re-loaded into the device whenever power is applied or different functionality is required.

FPGAs and CPLDs are often equally good choices for a particular task. Sometimes the decision is more an economic one than a technical one, or may depend on the engineer's personal preference and history.

Other Types of PLDs There is much interest in reconfigurable systems at present. These are microprocessor circuits that contain some fixed functions and other functions that can be altered by code running on the processor. Designing self-altering systems will require engineers to learn new methods, and will probably require new software tools to be developed.

PLDs are being sold now that contain a microprocessor with a fixed function (the so-called core) surrounded by programmable logic. These devices allow the designer to concentrate on adding new features to his design without having to worry about making the microprocessor work.

How PLDs Remember Their Configuration A PLD is a combination of a logic device and a memory device. The memory is used to store the pattern that was given to the chip during programming. Most of the methods for storing data in an integrated circuit have been adapted for use in PLDs. These include:

• silicon antifuses
• SRAM
• flash memory
• EPROM cells

Silicon antifuses are the storage elements used in the PAL, the first type of PLD. These are connections that are made by applying a voltage across a modified area of silicon inside the chip. They are called antifuses because they work in the opposite way to normal fuses, which begin life as connections until they are broken by an electric current.

SRAM, or static RAM, is a volatile type of memory, meaning that its contents are lost each time the power is switched off. SRAM-based PLDs therefore have to be programmed every time the circuit is switched on. This is usually done automatically by another part of the circuit.

Flash memory is non-volatile, retaining its contents even when the power is switched off. It can be erased and reprogrammed as required. This makes it useful for PLD memory.

An EPROM cell is a MOS (metal-oxide-semiconductor) transistor that can be switched on by trapping an electric charge permanently on its gate electrode. This is done by a PAL programmer. The charge remains for many years and can only be removed by exposing the chip to strong ultraviolet light in a device called an EPROM eraser.

PLD Programming Languages As mentioned in the "PAL" section above, JEDEC files are usually too complex to create by hand, so a computer program is used to generate them. This program is called a logic compiler, and is analogous to a software compiler. The languages used as source code for logic compilers are called hardware description languages, or HDLs.