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PCI-Express (formerly known as 3GIO for 3rd Generation I/O) is a new implementation of the PCI computer bus that uses existing PCI programming concepts and communications standards, but bases it on a much faster serial communications system. It is being supported primarily by Intel, who started working on the standard as the Arapahoe project after pulling out of the InfiniBand system.

PCI-Express is intended to be used as a local bus only. Due to it being based on the existing PCI system, cards and systems can be converted to PCI-Express by changing the physical layer only – existing systems could be re-booted on PCI-Express and never even know it. The higher speeds on PCI-Express allow it to replace almost all existing internal buses, including AGP and PCI, and Intel envisions a single PCI-Express controller talking to all external devices, as opposed to the current northbridge/southbridge solution in current machines.

PCI-Express is not, however, fast enough to be used as a memory bus. In this respect it is at a distinct disadvantage to the similar HyperTransport which can be used for this role as well. In addition PCI-Express does not offer the flexibility of the InfiniBand system, which has similar performance, but can be used for both internal and external buses.

External links

Creating a Third Generation I/O Interconnect (PDF) (http://developer.intel.com/technology/pciexpress/downloads/3rdGenWhitePaper.pdf)
Intel Develop Network for PCI Express Architecture (http://www.intel.com/technology/pciexpress/devnet/)

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