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HyperTransport is a bidirectional serial/parallel high-bandwidth computer bus. The technology is used (or is planned to be used) by a number of companies that notably include NVIDIA, AMD and Apple Computer, to replace existing local bus systems.

HyperTransport runs at 800MHz (compared to most systems at 133MHz or so) and can be "double-pumped", meaning it sends data on both the up and down "tick" of the 800MHz clock. Even in a simple serial configuration this allows for transfer rates of 1600Mb/s, or 200MBytes/s.

HyperTransport allows for various bus widths depending on needs, from 2 (bidirectional serial, 1 bit each way) to 32-bit (16 each way) busses are allowed. The full-sized 32-bit bus has a transfer rate of 6400MBytes/s, making it much faster than existing standards. Busses of various widths can be mixed together in a single application, which allows for high speed busses between main memory and the CPU, and lower speed busses to peripherals, as appropriate.

HyperTransport is packet-based, with each packet always consisting of a set of 32-bit words, regardless of the physical width of the bus interconnect. The first word in a packet is always a command word. If a packet contains an address, the last 8 bits of the command word are chained with the next 32-bit word to make a 40-bit address. The remaining 32-bit words in a packet are the data payload. Transfers are always padded to a multiple of 32 bits, regardless of their actual length.

Its electrical interface uses 1.2 volt Low Voltage Differential Signaling (LVDS).

Table of contents

Applications for HyperTransport

Backplane replacement

The primary uses for HyperTransport will be to replace the backplane bus, which is currently different for every machine (or some set of them). For instance, a Pentium cannot be plugged into a Pentium 4 backplane. In order to expand the system the backplane must include adaports for the various standard busses, like AGP or PCI. These are typically included in a controller called the northbridge[?].

A similar computer implemented with HyperTransport is more ?????, as well as being faster. A single PCI<->HyperTransport adaptor chip will work in any machine, and allow the PCI cards to talk to any CPU. nVIDIA already implements HyperTransport in their GEFORCE chip sets, and AMD is using it as their backplane in their future chipsets.

Multiprocessor interconnects

Another use for HyperTransport is as an interconnect for NUMA multiprocessor computers.

Router backplane replacements

to be written

See also:

Rapid I/O[?]

External links:


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