Intel 80486DX

The important changes were:

Data/Instruction Cache- An 8192-byte (8k) SRAM built into the processor core, designed to store the most commonly used instructions. This was split into two 4096-byte (4k) sections, which handled Data and Instructions. The 386 supported an off-chip cache, but this was much slower and did not have the Data/Instruction differentiation.

Pipelining- This allows the processor to handle a LocateFetchExecute each clock cycle. The pipeline is offset meaning the execute step required information from the previous two clock cycles. A locate would be to feed the next fetch, the fetch would be to feed the next execute. The 386 needs to do each step separately.

Virtual Memory Handler- Hardwired programming to handle swapping memory to hard drive.

Integrated FPU- Added accelerated high end math functions.

Standard Stuff: The 486 had a 32 bit data bus. This requires either 4 matched 30 pin simms or 1 72 pin simm

The 486 has a 32 bit address bus limiting it to a 4gb of ram.

The Early 486 machines often used VL bus for video cards and hard drives The bus speed matches the motherboard frequency.

See also Intel 80486