IA-32

The term was invented to distinguish the instruction set for Intel 80386 compatible series from that for incompatible series such as Itanium.

The IA-32 instruction set is usually described as CISC (Complex Instruction Set Computer) architecture, though such classifications have become less meaningful over time.

The set is implemented in all x86 CPUs newer than the 80386. IA-32 programs run in protected mode which has memory protection, the possibility to use memory above 640K (MS-DOS limit), virtual memory and multitasking. IA-32 programs can access a 4GB linear address space.

Each generation of CPUs since has added several features to this set:

• The 80386 could accept an optional coprocessor called the 80387 that enabled it to do floating point calculations via hardware. Some models of the 80486 had this coprocessor on-die.
• Pentium MMX added a set of extensions called MMX that can be used, among other things, to optimize multimedia software running on it.
• Pentium III adding SSE (Streaming SIMD Extensions)
• Pentium 4 adding SSE2[?]

The 80386 has eight 32 bit general application registers (and LOTS of system controlling registers)

data registers

All of the four following registers may be used as general purpose registers. However each has some specialized purpose as well.

• eax (with a special interpretation for arithmetic instructions; a for accumulator)
• ebx (base register, used for addressing)
• ecx (with a special interpretation for loops, c for counter)
• edx (data register)

address registers

• ebp base pointer
• esi source index (for string operations)
• edi destination index (for string operations)
• esp stack pointer

Real mode Instructions (8086/8088 compatibility) are:

aaa, aad, aam, aas, adc, add, and, call, cbw, clc, cld, cli, cmc, cmp, cmpsb, smpsw, cwd, daa, das, dec, div, esc, hlt, idiv, imul, in, inc, int, into, iret, jajae, jb, jbe, jc, jcxz, je, jg, jge, jl, jle, jmp, jna, jnae, jnb, jnbe, jnc, jne, jng, jnge, jnlm, jnle, jno, jnp, jns, jnz, jo, jp, jpe, jpo, js, jz, lahf, lds, lea, les, lock, lodsb, lodsw, loop, loope, loopne, loopnz, loopz, mov, movsb, movsw, mul, neg, nop, not, or, out, pop, popf, push, push, puchf, rcl, rcr, rep, repe, repne, repnz, repz, ret, rol, ror, sahf, sal, sar, sbb, scasb, scasw, shl, shr, stc, std, sti, stosb, stosw, sub, test, wait, xchg, xlat, xor (please de-typo)

This is the full 8086-8088 instruction set, but most, if not all of these instructions are available in 32-bit mode, they just operate on 32 bit registers (eax, ebx, etc) and values instead of the ir 16-bit (ax, bx, etc) couterparts. See also x86-assembly for a quick tutorial for this chip.

There is also another mode in wich the processor acts as a pure 32-bit processor - protected mode. This mode was introduced with the 80386-processor (actually, the 286 processor, but the 286 still used 16 bit registers).

Intel's newer IA-64 architecture is not directly compatible with the IA-32 instruction set. AMD's new AMD64 instruction set is largely compatible with IA-32, and includes a number of extensions.

See also: Wintel, 68000