A
counter is a type of memory considered in
computability theory. A counter stores a single
natural number (initially
zero) and can be
arbitrarily-many digits long. A counter is usually considered in conjunction with a
finite state machine (FSM), which can perform the following operations on the counter:
- Check whether the counter is zero
- Increment the counter by one
- Decrement the counter by one (if it's already zero, this leaves it unchanged)
Power
The following machines are listed in order of power, with each one being strictly more powerful than the one below it:
- Deterministic or Non-deterministic FSM plus two counters
- Non-deterministic FSM plus one stack
- Non-deterministic FSM plus one counter
- Deterministic FSM plus one counter
- Deterministic or Non-deterministic FSM
For the first and last, it doesn't matter whether the FSM is deterministic or non-deterministic (see determinism). They have equivalent power. The first two and the last one are levels of the Chomsky hierarchy.
The first machine, an FSM plus two counters, is equivalent in power to a Turing machine. This equivalence can be shown in three steps. First, a Turing machine can be simulated by two stacks. Then, a stack can be simulated by two counters. Finally, four counters can be simulated by two counters.
A Turing machine consists of an FSM and an infinite tape, initially filled with zeros, upon which the machine can write ones and zeros. At any time, the read/write head of the machine points to one cell on the tape. This tape can be conceptually cut in half at that point. Each half of the tape can be treated as a
stack, where the top is the cell nearest the read/write head, and the bottom is some distance away from the head, with all zeros on the tape beyond the bottom. Accordingly, a Turing machine can be simulated by an FSM plus two stacks. Moving the head left or right is equivalent to popping a bit from one stack and pushing it onto the other. Writing is equivalent to changing the bit before pushing it.
A stack containing zeros and ones can be simulated by two counters, when the bits on the stack are thought of as representing a binary number, with the top being the least significant bit. Pushing a zero onto the stack is equivalent to doubling the number. Pushing a one is equivalent to doubling and adding 1. Popping is equivalent to dividing by 2, where the remainder is the bit that was popped. Two counters can simulate this stack, in which one of the counters holds a number whose binary representation represents the bits on the stack, and the other counter is used as a scratchpad. To double the number in the first counter, the FSM can initialize the second counter to zero, then repeatedly decrement the first counter once and increment the second counter twice. This continues until the first counter reaches zero. At that point, the second counter will hold the doubled number. Halving is performed by decrementing one counter twice and increment the other once, and repeating until the first counter reaches zero. The remainder can be determined by whether it reached zero after an even or an odd number of tries.
As before, one of the counters is used as scratchpad. The other, real counter holds an integer whose
prime factorization is 2
a3
b5
c7
d. The exponents
a,
b,
c, and
d can be thought of as four virtual counters that are being simulated. If the real counter is set to zero then incremented once, that is equivalent to setting all the virtual counters to zero. If the real counter is doubled, that is equivalent to incrementing
a, and if it's halved, that's equivalent to decrementing
a. By a similar procedure, it can be multiplied or divided by 3, which is equivalent to incrementing or decrementing
b. Similarly,
c and
d can be incremented or decremented. To check if a virtual counter such as
c is equal to zero, just divide the real counter by 5, see what the remainder is, then multiply by 5 and add back the remainder. That leaves the real counter unchanged. The remainder will have been nonzero if and only if
c was zero.
As a result, an FSM with two counters can simulate four counters, which are in turn simulating two stacks, which are simulating a Turing machine. Therefore, an FSM plus two counters is at least as powerful as a Turing machine. A Turing machine can easily simulate an FSM with two counters, therefore the two machines have equivalent power.
All Wikipedia text
is available under the
terms of the GNU Free Documentation License