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The 6502 was designed primarily by the same team that had designed the Motorola 6800. After quitting Motorola en-mass, they quickly designed their 6501, a completely new design that was nevertheless pin-compatible with the 6800. Motorola immediately sued, although today the case would have been dismissed out of hand, and the damage to MOS was enough for them to agree to stop producing the 6501.
The result was the similar 6502. It differed only by re-arranging the pins so it would no longer run in a 6800 motherboard,and Motorola was apparently no longer interested. However this left MOS with the problem of getting new developers onto the system, so in response Chuck Peddle designed the KIM-1 single-board computer. Much to their surprise, the KIM-1 sold in "huge" numbers to hobbiests and tinkerers as well as their intended market of engineers.
The 6502 was released to the market in September 1975 at $25, while at the same show the 6800 and Intel 8008 were selling for $179. At first many people thought it was some sort of a scam, but before the show was over both Motorola and Intel had dropped their prices to $79. Instead of saving them, the 6502 was now legitimized and started selling by the hundreds.
The 6502 had one feature that made it particularily good for a home computer system, a small delay in which it was guarenteed to not be using the bus. Video display hardware could use this period to read out a line of the screen without having the 6502 pause while this happened. In general terms this sped the performance of a system using the 6502 by about 25%.
One of the first "public" uses for the design was the Atari 2600. The 2600 used an offshoot of the 6502 called the 6507, which had fewer pins and could address only 4k of RAM as a result. Millions would be sold in this form. It was next used in the Apple II family, and then quickly appeared in various Commodore and Atari personal computers, the BBC Micro, and a huge number of other designs lost to history.
Another important use of the 6502 was in the Nintendo Entertainment System or NES (Famicom in Japan). The 6502 used in the NES was a modified version that was produced solely for Nintendo, called "2A03". The 2A03 lacked the 6502's decimal mode but added 23 memory-mapped registers for sound generation, object drawing, and joypad reading.
The 6502 is an 8-bit processor with a 16-bit address bus. The internal logic runs at four times the external clock rate, which means that the seemingly slow clock speeds, typically 1MHz, is actually competitive with other CPUs running four times as fast. Although this may sound like a "trick", it had the side effect of lowering the speed of the peripherals attached to the CPU, thus lowering overal system cost.
Another speed and price enhancement was to simplify the decoder stage: there were no op-codes with the value xxxxxx11, reducing that 1-of-4 decoder to a single NAND gate. Instructions with the value xxxxxx11 actually executed two instructions in parallel, some of them useful.
Unlike the Intel 8080 and similar microprocessors, the 6502 had very few registers. At the time RAM was faster than CPUs, so it made sense to optimize for RAM access rather than increase the number of registers on a chip. Inside was one 8-bit register (the accumulator), two 8-bit index registers, an 8-bit status register and an 8-bit stack pointer.
The stack's address space was hard wired at $0100 (256) to $01FF (511). Software access to the stack was through four implied mode instructions, whose functions were to push or pop the accumulator or the processor status register.
It used these index and stack registers effectively, with more addressing modes, including a fast "direct page" or "zero page" mode that accessed memory locations from address 0 to 255 with an 8-bit address (it didn't have to fetch a second byte for the address); code for the 6502 used the zero page much as code for other processors would have used registers.
Addressing modes also included implied (1 byte instructions); absolute (3 bytes); relative (2 bytes); accumulator (1); (indirect,x) (2); (indirect),y (2); and immediate (2). Absolute mode was a general-purpose mode. Relative was used for conditional branch instructions, which could move the program counter up to 128 bytes forward or backward. Accumulator mode used the accumulator as an effective address, and didn't need any operand data. The indirect modes were useful for array processing. The offset was an 8-bit quantity stored in page 0 memory. Immediate mode used an 8-bit literal[?] operand.
6502s are almost notorious for having a variety of undocumented instructions, which vary from one design to the next. This was caused by roughly 32 opcodes being left undefined in the original 6502. This was common at the time, less useful instructions were printed at the outside edges of the chip, so if yields were low you could simply not document those opcodes, and many more chips would pass tests (often the damage to a chip is on the outside).
The 6502's indirect jump instruction, JMP (xxxx), was broken. If the address was hexadecimal xxFF, the processor would not access the address stored in xxFF and xxFF + 1, but rather xxFF and xx00. The 6510 did not fix this bug, nor was it fixed in any of the other NMOS versions of the 6502 such as the 8502 and the 2A03. William Mensch at Western Design Center was probably the first to fix it, in the 65C02; he then went on to design the WDC 65C816[?] processor.
See also:
This article (or an earlier version of it) contains material from FOLDOC, used with permission.
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